IDT72V281 memories equivalent, cmos fifo memories.
ming method, existing timing mode or programma.
that need to buffer large amounts of data. The input port is controlled by a Write Clock (WCLK) input and a Write Enable.
The IDT72V281/72V291 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following:
* The limitati.
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